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el2001c december 1995 rev g el2001c low power, 70 mhz buffer amplifier note: all information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a ``controlled document''. current revisions, if any, to these specifications are maintained at the factory and are available upon your request. we recommend checking the revision level before finalization of your design documentation. ? 1989 elantec, inc. features # 1.3 ma supply current # 70 mhz bandwidth # 2000 v/ m s slew rate # low bias current, 1 m a typical # 100 ma output current # short circuit protected # low cost # stable with capacitive loads # wide supply range g 5v to g 15v # no thermal runaway applications # op amp output current booster # cable/line driver # a/d input buffer # low standby current systems ordering information part no. temp. range pkg. outline y EL2001ACN 0 cto a 75 c p-dip mdp0031 el2001cm 0 cto a 75 c 20-lead sol mdp0027 el2001cn 0 cto a 75 c p-dip mdp0031 general description the el2001 is a low cost monolithic, high slew rate, buffer amplifier. built using the elantec monolithic complementary bipolar process, this patented buffer has a b 3 db bandwidth of 70 mhz, and delivers 100 ma, yet draws only 1.3 ma of supply current. it typically operates from g 15v power supplies but will work with as little as g 5v. this high speed buffer may be used in a wide variety of applica- tions in military, video and medical systems. a typical example is a general purpose op amp output current booster where the buffer must have sufficiently high bandwidth and low phase shift at the maximum frequency of the op amp. elantec's products and facilities comply with mil-i-45208a, and other applicable quality specifications. for information on elantec's processing, see the elantec document, qra-1: elan- tec's processing, monolithic integrated circuits . connection diagrams el2001 dip pinout el2001 sol pinout 2001 1 top view 2001 2 top view note: non-designated pins are no connects and are not electrically connected internally. manufactured under u.s. patent no. 4,833,424, 4,827,223 u.k. patent no. 2217134
el2001c low power, 70 mhz buffer amplifier absolute maximum ratings v s supply voltage (v ab v b ) g 18v or 36v v in input voltage (note 1) g 15v or v s i in input current (note 1) g 50 ma p d power dissipation (note 2) see curves output short circuit duration (note 3) continuous t a operating temperature range el2001ac/el2001c 0 cto a 75 c t j operating junction temperature 150 c t st storage temperature b 65 cto a 150 c important note: all parameters having min/max specifications are guaranteed. the test level column indicates the specific device testing actually performed during production and quality inspection. elantec performs most electrical tests using modern high-speed automatic test equipment, specifically the ltx77 series system. unless otherwise noted, all tests are pulsed tests, therefore t j e t c e t a . test level test procedure i 100% production tested and qa sample tested per qa test plan qcx0002. ii 100% production tested at t a e 25 c and qa sample tested at t a e 25 c, t max and t min per qa test plan qcx0002. iii qa sample tested per qa test plan qcx0002. iv parameter is guaranteed (but not tested) by design and characterization data. v parameter is typical value at t a e 25 c for information purposes only. electrical characteristics v s e g 15v, r s e 50 x , unless otherwise specified test conditions limits el2001ac parameter description el2001c units v in load temp min typ max test level v os offset voltage 0 % 25 c b 10 2 i i mv el2001a/el2001ac t min ,t max b 15 a 15 iii mv el2001/el2001c 0 % 25 c b 30 2 a 30 i mv t min ,t max b 40 a 40 iii mv i in input current 0 % 25 c b 31 a 3i m a el2001a/el2001ac t min ,t max b 6 a 6 iii m a el2001/el2001c 0 % 25 c b 51 a 5i m a t min ,t max b 10 a 10 iii m a r in input resistance g 12v 100 x 25 18 i m x t min ,t max 0.5 iii m x 2 td is 2.5in
el2001c low power, 70 mhz buffer amplifier electrical characteristics v s e g 15v, r s e 50 x , unless otherwise specified e contd. test conditions limits el2001ac parameter description el2001c units v in load temp min typ max test level a v1 voltage gain g 12v % 25 c 0.990 0.998 i v/v t min ,t max 0.985 iii v/v a v2 voltage gain g 10v 100 x 25 c 0.83 0.93 i v/v t min ,t max 0.80 iii v/v a v3 voltage gain g 3v 100 x 25 c 0.82 0.89 i v/v with v s e g 5v t min ,t max 0.79 iii v/v v o output voltage g 12v 100 x 25 c g 10 g 11 i v swing t min ,t max g 9.5 iii v r out output resistance g 2v 100 x 25 c1015i x t min ,t max 18 iii x i out output current g 12v (note 4) 25 c g 100 g 160 i ma t min ,t max g 95 iii ma i s supply current 0 % 25 c 1.3 2.0 i ma t min ,t max 2.5 iii ma psrr supply rejection, 0 % 25 c6075 i db (note 5) t min ,t max 50 iii db t r rise time 0.5v 100 x 25 c 4.2 v ns t d propagation delay 0.5v 100 x 25 c 2.0 v ns sr slew rate, (note 6) g 10v 100 x 25 c 1200 2000 iv v/ m s note 1: if the input exceeds the ratings shown (or the supplies) or if the input to output voltage exceeds g 7.5v then the input current must be limited to g 50 ma. see the applications section for more information. note 2: the maximum power dissipation depends on package type, ambient temperature and heat sinking. see the characteristic curves for more details. note 3: a heat sink is required to keep the junction temperature below the absolute maximum when the output is short circuited. note 4: force the input to a 12v and the output to a 10v and measure the output current. repeat with b 12 v in and b 10v on the output. note 5: v os is measured at v s aea 4.5v, v s beb 4.5v and at v s aea 18v, v s beb 18v. both supplies are changed simultaneously. note 6: slew rate is measured between v out ea 5v and b 5v. 3 td is 4.2in
el2001c low power, 70 mhz buffer amplifier typical performance curves vs temperature offset voltage vs temperature voltage gain vs temperature output voltage swing vs supply voltage supply current vs input voltage voltage gain vs source resistance voltage gain vs input voltage input bias current vs supply voltage g slew rate vs capacitive load g slew rate 2001 4 4
el2001c low power, 70 mhz buffer amplifier typical performance curves e contd. for various resistive loads voltage gain vs frequency capacitive loads; r l e 100 x vs frequency for various voltage gain capacitive loads; r l e % vs frequency for various voltage gain for various capacitive loads phase shift vs frequency vs supply voltage b 3 db bandwidth vs frequency power supply rejection ratio output impedance vs frequency reverse isolation vs frequency vs output current small signal output resistance 2001 5 5
el2001c low power, 70 mhz buffer amplifier typical performance curves e contd. vs ambient temperature maximum power dissipation 8-lead plastic dip vs ambient temperature maximum power dissipation 20-lead sol vs temperature short circuit current 2001 6 large signal response 2001 7 small signal response 2001 8 6
el2001c low power, 70 mhz buffer amplifier burn-in circuit 2001 9 simplified schematic 2001 10 application information the el2001 is a monolithic buffer amplifier built on elantec's proprietary dielectric isolation pro- cess that produces npn and pnp transistors with essentially identical dc and ac characteris- tics. the el2001 takes full advantage of the com- plementary process with a unique circuit topolo- gy. elantec has applied for two patents based on the el2001's topology. the patents relate to the base drive and feedback mechanism in the buffer. this feedback makes 2000 v/ m s slew rates with 100 x loads possible with very low supply current. power supplies the el2001 may be operated with single or split supplies with total voltage difference between 10v ( g 5v) and 36v ( g 18v). it is not necessary to use equal split value supplies. for example b 5v and a 12v would be excellent for signals from b 2v to a 9v. bypass capacitors from each supply pin to ground are highly recommended to reduce supply ringing and the interference it can cause. at a minimum, 1 m f tantalum capacitor with short leads should be used for both supplies. input characteristics the input to the el2001 looks like a resistance in parallel with about 3.5 picofarads in addition to a dc bias current. the dc bias current is due to the miss-match in beta and collector current be- tween the npn and pnp transistors connected to the input pin. the bias current can be either positive or negative. the change in input current with input voltage (r in ) is affected by the out- put load, beta and the internal boost. r in can actually appear negative over portions of the in- put range; typical input current curves are shown in the characteristic curves. internal clamp di- odes from the input to the output are provided. these diodes protect the transistor base emitter junctions and limit the boost current during slew to avoid saturation of internal transistors. the diodes begin conduction at about g 2.5v input to output differential. when that happens the input resistance drops dramatically. the diodes are rat- ed at 50 ma. when conducting they have a series resistance of about 20 x . there is also 100 x in series with the input that limits input current. above g 7.5v differential input to output, addi- tional series resistance should be added. source impedance the el2001 has good input to output isolation. when the buffer is not used in a feedback loop, capactive and resistive sources up to 1 meg pres- ent no oscillation problems. care must be used in board layout to minimize output to input cou- pling. caution: when using high source im- pedances (r s l 100 k x ), significant gain errors can be observed due to output offset, load resis- tor, and the action of the boost circuit. see typi- cal performance curves. 7
el2001c low power, 70 mhz buffer amplifier el2001c macromodel * connections: a input * l a vsupply * ll b vsupply * lll output * llll .subckt m2001 2 1 4 7 * input stage el100201.0 r1 10 0 1k rh 10 11 150 ch 11 0 9pf rc 11 12 100 cc 12 0 4pf e2 13 0 12 0 1.0 * output stage q141314qp q211315qn q311416qn q441519qp r2 16 7 1 r3 19 7 1 i1 1 14 0.9ma i2 15 4 0.9ma * bias current iin a 2 0 1ua * models .model qn npn(is e 5e b 15 bf e 150 rb e 200 ptf e 45 tf e 0.1ns) .model qp pnp(is e 5e b 15 bf e 150 rb e 200 ptf e 45 tf e 0.1ns) .ends 8 tab wide td is 3.9in
el2001c low power, 70 mhz buffer amplifier el2001c macromodel e contd. 2001 11 9
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el2001c december 1995 rev g el2001c low power, 70 mhz buffer amplifier general disclaimer specifications contained in this data sheet are in effect as of the publication date shown. elantec, inc. reserves the right to make changes in the circuitry or specifications contained herein at any time without notice. elantec, inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. elantec, inc. 1996 tarob court milpitas, ca 95035 telephone: (408) 945-1323 (800) 333-6314 fax: (408) 945-9305 european office: 44-71-482-4596 warning e life support policy elantec, inc. products are not authorized for and should not be used within life support systems without the specific written consent of elantec, inc. life support systems are equipment in- tended to support or sustain life and whose failure to perform when properly used in accordance with instructions provided can be reasonably expected to result in significant personal injury or death. users contemplating application of elantec, inc. products in life support systems are requested to contact elantec, inc. factory headquarters to establish suitable terms & conditions for these applications. elantec, inc.'s warranty is limited to replace- ment of defective components and does not cover injury to per- sons or property or other consequential damages. printed in u.s.a. 12

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